Macros
#define	MXC_R_DMA_CFG ((uint32_t)0x00000100UL)

#define	MXC_R_DMA_ST ((uint32_t)0x00000104UL)

#define	MXC_R_DMA_SRC ((uint32_t)0x00000108UL)

#define	MXC_R_DMA_DST ((uint32_t)0x0000010CUL)

#define	MXC_R_DMA_CNT ((uint32_t)0x00000110UL)

#define	MXC_R_DMA_SRC_RLD ((uint32_t)0x00000114UL)

#define	MXC_R_DMA_DST_RLD ((uint32_t)0x00000118UL)

#define	MXC_R_DMA_CNT_RLD ((uint32_t)0x0000011CUL)

#define	MXC_R_DMA_CN ((uint32_t)0x00000000UL)

#define	MXC_R_DMA_INTFL ((uint32_t)0x00000004UL)

#define	MXC_R_DMA_CH ((uint32_t)0x00000100UL)

Detailed Description

DMA Peripheral Register Offsets from the DMA Base Peripheral Address.

Macro Definition Documentation

◆ MXC_R_DMA_CFG

#define MXC_R_DMA_CFG ((uint32_t)0x00000100UL)

Offset from DMA Base Address: 0x0100

◆ MXC_R_DMA_CH

#define MXC_R_DMA_CH ((uint32_t)0x00000100UL)

Offset from DMA Base Address: 0x0100

◆ MXC_R_DMA_CN

#define MXC_R_DMA_CN ((uint32_t)0x00000000UL)

Offset from DMA Base Address: 0x0000

◆ MXC_R_DMA_CNT

#define MXC_R_DMA_CNT ((uint32_t)0x00000110UL)

Offset from DMA Base Address: 0x0110

◆ MXC_R_DMA_CNT_RLD

#define MXC_R_DMA_CNT_RLD ((uint32_t)0x0000011CUL)

Offset from DMA Base Address: 0x011C

◆ MXC_R_DMA_DST

#define MXC_R_DMA_DST ((uint32_t)0x0000010CUL)

Offset from DMA Base Address: 0x010C

◆ MXC_R_DMA_DST_RLD

#define MXC_R_DMA_DST_RLD ((uint32_t)0x00000118UL)

Offset from DMA Base Address: 0x0118

◆ MXC_R_DMA_INTFL

#define MXC_R_DMA_INTFL ((uint32_t)0x00000004UL)

Offset from DMA Base Address: 0x0004

◆ MXC_R_DMA_SRC

#define MXC_R_DMA_SRC ((uint32_t)0x00000108UL)

Offset from DMA Base Address: 0x0108

◆ MXC_R_DMA_SRC_RLD

#define MXC_R_DMA_SRC_RLD ((uint32_t)0x00000114UL)

Offset from DMA Base Address: 0x0114

◆ MXC_R_DMA_ST

#define MXC_R_DMA_ST ((uint32_t)0x00000104UL)

Offset from DMA Base Address: 0x0104

Macros