Macros
#define	MXC_F_MCR_AINCOMP_AINCOMP0PD_POS 0

#define	MXC_F_MCR_AINCOMP_AINCOMP0PD ((uint32_t)(0x1UL << MXC_F_MCR_AINCOMP_AINCOMP0PD_POS))

#define	MXC_F_MCR_AINCOMP_AINCOMP1PD_POS 1

#define	MXC_F_MCR_AINCOMP_AINCOMP1PD ((uint32_t)(0x1UL << MXC_F_MCR_AINCOMP_AINCOMP1PD_POS))

#define	MXC_F_MCR_AINCOMP_AINCOMP2PD_POS 2

#define	MXC_F_MCR_AINCOMP_AINCOMP2PD ((uint32_t)(0x1UL << MXC_F_MCR_AINCOMP_AINCOMP2PD_POS))

#define	MXC_F_MCR_AINCOMP_AINCOMP3PD_POS 3

#define	MXC_F_MCR_AINCOMP_AINCOMP3PD ((uint32_t)(0x1UL << MXC_F_MCR_AINCOMP_AINCOMP3PD_POS))

#define	MXC_F_MCR_AINCOMP_AINCOMPHYST_POS 4

#define	MXC_F_MCR_AINCOMP_AINCOMPHYST ((uint32_t)(0x3UL << MXC_F_MCR_AINCOMP_AINCOMPHYST_POS))

Detailed Description

Comparator Power Control Register.

Macro Definition Documentation

#define MXC_F_MCR_AINCOMP_AINCOMP0PD ((uint32_t)(0x1UL << MXC_F_MCR_AINCOMP_AINCOMP0PD_POS))

AINCOMP_AINCOMP0PD Mask

#define MXC_F_MCR_AINCOMP_AINCOMP0PD_POS 0

AINCOMP_AINCOMP0PD Position

#define MXC_F_MCR_AINCOMP_AINCOMP1PD ((uint32_t)(0x1UL << MXC_F_MCR_AINCOMP_AINCOMP1PD_POS))

AINCOMP_AINCOMP1PD Mask

#define MXC_F_MCR_AINCOMP_AINCOMP1PD_POS 1

AINCOMP_AINCOMP1PD Position

#define MXC_F_MCR_AINCOMP_AINCOMP2PD ((uint32_t)(0x1UL << MXC_F_MCR_AINCOMP_AINCOMP2PD_POS))

AINCOMP_AINCOMP2PD Mask

#define MXC_F_MCR_AINCOMP_AINCOMP2PD_POS 2

AINCOMP_AINCOMP2PD Position

#define MXC_F_MCR_AINCOMP_AINCOMP3PD ((uint32_t)(0x1UL << MXC_F_MCR_AINCOMP_AINCOMP3PD_POS))

AINCOMP_AINCOMP3PD Mask

#define MXC_F_MCR_AINCOMP_AINCOMP3PD_POS 3

AINCOMP_AINCOMP3PD Position

#define MXC_F_MCR_AINCOMP_AINCOMPHYST ((uint32_t)(0x3UL << MXC_F_MCR_AINCOMP_AINCOMPHYST_POS))

AINCOMP_AINCOMPHYST Mask

#define MXC_F_MCR_AINCOMP_AINCOMPHYST_POS 4

AINCOMP_AINCOMPHYST Position