PWRSEQ_LPPWKEN

Macros
#define	MXC_F_PWRSEQ_LPPWKEN_LPTMR0_POS   0
#define	MXC_F_PWRSEQ_LPPWKEN_LPTMR0   ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWKEN_LPTMR0_POS))
#define	MXC_F_PWRSEQ_LPPWKEN_LPTMR1_POS   1
#define	MXC_F_PWRSEQ_LPPWKEN_LPTMR1   ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWKEN_LPTMR1_POS))
#define	MXC_F_PWRSEQ_LPPWKEN_LPUART0_POS   2
#define	MXC_F_PWRSEQ_LPPWKEN_LPUART0   ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWKEN_LPUART0_POS))

Detailed Description

Low Power Peripheral Wakeup Enable Register.

Macro Definition Documentation

MXC_F_PWRSEQ_LPPWKEN_LPTMR0

#define MXC_F_PWRSEQ_LPPWKEN_LPTMR0   ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWKEN_LPTMR0_POS))

LPPWKEN_LPTMR0 Mask

MXC_F_PWRSEQ_LPPWKEN_LPTMR0_POS

#define MXC_F_PWRSEQ_LPPWKEN_LPTMR0_POS   0

LPPWKEN_LPTMR0 Position

MXC_F_PWRSEQ_LPPWKEN_LPTMR1

#define MXC_F_PWRSEQ_LPPWKEN_LPTMR1   ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWKEN_LPTMR1_POS))

LPPWKEN_LPTMR1 Mask

MXC_F_PWRSEQ_LPPWKEN_LPTMR1_POS

#define MXC_F_PWRSEQ_LPPWKEN_LPTMR1_POS   1

LPPWKEN_LPTMR1 Position

MXC_F_PWRSEQ_LPPWKEN_LPUART0

#define MXC_F_PWRSEQ_LPPWKEN_LPUART0   ((uint32_t)(0x1UL << MXC_F_PWRSEQ_LPPWKEN_LPUART0_POS))

LPPWKEN_LPUART0 Mask

MXC_F_PWRSEQ_LPPWKEN_LPUART0_POS

#define MXC_F_PWRSEQ_LPPWKEN_LPUART0_POS   2

LPPWKEN_LPUART0 Position