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MAX32675 Peripheral Driver API
Peripheral Driver API for the MAX32675
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Macros | |
| #define | MXC_F_SPI_CLKCTRL_LO_POS 0 |
| #define | MXC_F_SPI_CLKCTRL_LO ((uint32_t)(0xFFUL << MXC_F_SPI_CLKCTRL_LO_POS)) |
| #define | MXC_V_SPI_CLKCTRL_LO_DIS ((uint32_t)0x0UL) |
| #define | MXC_S_SPI_CLKCTRL_LO_DIS (MXC_V_SPI_CLKCTRL_LO_DIS << MXC_F_SPI_CLKCTRL_LO_POS) |
| #define | MXC_F_SPI_CLKCTRL_HI_POS 8 |
| #define | MXC_F_SPI_CLKCTRL_HI ((uint32_t)(0xFFUL << MXC_F_SPI_CLKCTRL_HI_POS)) |
| #define | MXC_V_SPI_CLKCTRL_HI_DIS ((uint32_t)0x0UL) |
| #define | MXC_S_SPI_CLKCTRL_HI_DIS (MXC_V_SPI_CLKCTRL_HI_DIS << MXC_F_SPI_CLKCTRL_HI_POS) |
| #define | MXC_F_SPI_CLKCTRL_CLKDIV_POS 16 |
| #define | MXC_F_SPI_CLKCTRL_CLKDIV ((uint32_t)(0xFUL << MXC_F_SPI_CLKCTRL_CLKDIV_POS)) |
Register for controlling SPI clock rate.
| #define MXC_F_SPI_CLKCTRL_CLKDIV ((uint32_t)(0xFUL << MXC_F_SPI_CLKCTRL_CLKDIV_POS)) |
CLKCTRL_CLKDIV Mask
| #define MXC_F_SPI_CLKCTRL_CLKDIV_POS 16 |
CLKCTRL_CLKDIV Position
| #define MXC_F_SPI_CLKCTRL_HI ((uint32_t)(0xFFUL << MXC_F_SPI_CLKCTRL_HI_POS)) |
CLKCTRL_HI Mask
| #define MXC_F_SPI_CLKCTRL_HI_POS 8 |
CLKCTRL_HI Position
| #define MXC_F_SPI_CLKCTRL_LO ((uint32_t)(0xFFUL << MXC_F_SPI_CLKCTRL_LO_POS)) |
CLKCTRL_LO Mask
| #define MXC_F_SPI_CLKCTRL_LO_POS 0 |
CLKCTRL_LO Position
| #define MXC_S_SPI_CLKCTRL_HI_DIS (MXC_V_SPI_CLKCTRL_HI_DIS << MXC_F_SPI_CLKCTRL_HI_POS) |
CLKCTRL_HI_DIS Setting
| #define MXC_S_SPI_CLKCTRL_LO_DIS (MXC_V_SPI_CLKCTRL_LO_DIS << MXC_F_SPI_CLKCTRL_LO_POS) |
CLKCTRL_LO_DIS Setting
| #define MXC_V_SPI_CLKCTRL_HI_DIS ((uint32_t)0x0UL) |
CLKCTRL_HI_DIS Value
| #define MXC_V_SPI_CLKCTRL_LO_DIS ((uint32_t)0x0UL) |
CLKCTRL_LO_DIS Value